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Perftest: Add MUSA GPUDirect backend#397

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Perftest: Add MUSA GPUDirect backend#397
Lyapunova-cd wants to merge 1 commit into
linux-rdma:masterfrom
Lyapunova-cd:musa_6_29

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@Lyapunova-cd Lyapunova-cd commented Jul 10, 2026

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Add a first-class Moore-Threads GPU Software Architecture MUSA memory backend that follows the CUDA dynamic loading model. The backend loads libmusa at runtime, supports device memory allocation, DMA-BUF export and PCIe mapping, and exposes MUSA GPUDirect command line options.

Reject plain RDMA WRITE latency tests with MUSA device memory to avoid CPU polling of GPU memory. Users must request write-with-imm explicitly for MUSA ib_write_lat.

Validation

Validated on Moore Threads S5000 GPU cards with RDMA NICs.

Build and linkage:

  • ./autogen.sh && ./configure MUSA_H_PATH=/usr/local/musa/include/musa.h && make -j$(nproc) passed
  • ib_write_lat --help shows the MUSA options
  • ldd ./ib_write_lat does not show a direct libmusa dependency

Functional coverage:

  • Host-memory baseline coverage passed for send/write/read/atomic bandwidth and latency tests
  • MUSA DMA-BUF coverage passed for send/write/read/atomic bandwidth and latency tests
  • MUSA ib_write_lat --write_with_imm passed for 2, 7408, and 8192 byte messages
  • Plain MUSA ib_write_lat without --write_with_imm fails cleanly with:
    Perftest doesn't support device memory latency test with write (without immediate) verb; use --write_with_imm
  • Invalid option combinations fail cleanly:
    • --use_musa_dmabuf without MUSA
    • --use_musa_pcie_mapping without DMA-BUF

Selected MUSA DMA-BUF results:

Test Size QPs Result
ib_send_bw 8192 1 130.48 Gb/s
ib_send_bw 8192 4 168.35 Gb/s
ib_write_bw 7408 4 83.79 Gb/s
ib_write_bw 7408 16 153.83 Gb/s
ib_write_bw 8192 4 169.15 Gb/s
ib_write_bw 8192 16 367.29 Gb/s
ib_read_bw 8192 4 308.07 Gb/s
ib_read_bw 8192 16 368.69 Gb/s
ib_send_lat 2 - 6.25 usec
ib_write_lat --write_with_imm 2 - 6.24 usec
ib_write_lat --write_with_imm 7408 - 7.06 usec
ib_write_lat --write_with_imm 8192 - 7.00 usec
ib_read_lat 2 - 10.63 usec
ib_read_lat 8192 - 11.26 usec
ib_atomic_lat 8 - 10.62 usec

Add a first-class MUSA memory backend that follows the CUDA
dynamic loading model. The backend loads libmusa at runtime,
supports device memory allocation, DMA-BUF export and PCIe mapping,
and exposes MUSA GPUDirect command line options.

Reject plain RDMA WRITE latency tests with MUSA device memory to
avoid CPU polling of GPU memory. Users must request write-with-imm
explicitly for MUSA ib_write_lat.

Signed-off-by: hongwei.liu <hongwei.liu@mthreads.com>
@Lyapunova-cd

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Hi @sshaulnv

Could you please take a look when you have time?

This PR adds a MUSA GPUDirect backend following the existing CUDA dynamic-loading model. I also added validation coverage on Moore Threads S5000 GPU cards with RDMA NICs.

Validation summary:

  • Build passed with ./autogen.sh && ./configure MUSA_H_PATH=/usr/local/musa/include/musa.h && make -j$(nproc)
  • Verified the binaries do not directly link against libmusa
  • Host-memory baseline passed for send/write/read/atomic bandwidth and latency tests
  • MUSA DMA-BUF passed for send/write/read/atomic bandwidth and latency tests
  • ib_write_lat --use_musa --use_musa_dmabuf --write_with_imm passed for 2, 7408, and 8192 byte messages
  • Plain MUSA ib_write_lat without --write_with_imm fails cleanly instead of polling GPU memory from the CPU
  • Invalid MUSA DMA-BUF / PCIe mapping option combinations fail cleanly

I am happy to address review feedback and help maintain the MUSA backend.

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2 participants