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startCycle < minCycle (18MissWritebackEvent)

Status: Open.

#276 In s5z/zsim;

· CannotDeFine opened on Nov 4, 2025

How to accurately simulate the concurrent data transfer characteristics of multi-channel DDR?

Status: Open.

#274 In s5z/zsim;

· LujhCoconut opened on Dec 5, 2024

zsim alters the program execution behavior.

Status: Open.

#273 In s5z/zsim;

· dkadiyala3 opened on Oct 20, 2024

Only one last-level cache allowed

Status: Open.

#272 In s5z/zsim;

· apoorvaaaa5 opened on Aug 19, 2024

Trace Generator for Detailed Application Analysis

Status: Open.

#271 In s5z/zsim;

· apoorvaaaa5 opened on Aug 17, 2024

error in build/opt/zsim

Status: Open.

#269 In s5z/zsim;

· apoorvaaaa5 opened on Jul 2, 2024

Deadlock in openmp application

Status: Open.

#268 In s5z/zsim;

· captainnotseeingthesea opened on Apr 4, 2024

Supporting Modern AVX Instructions

Status: Open.

#267 In s5z/zsim;

· bakhshalipour opened on Dec 5, 2022

Implementation of RRIP

Status: Open.

#266 In s5z/zsim;

· HuangPZ opened on Jul 27, 2022

Question: Does zsim implement anything akin to an alias predictor?

Status: Open.

#265 In s5z/zsim;

· muke101 opened on Jun 13, 2022

Help with enabling debugger

Status: Open.

#264 In s5z/zsim;

· abhishekk06 opened on May 13, 2022

Using zsim with pin 2.14 on ubuntu 20.04 (kernel version 5.4.0-104-generic)

Status: Open.

#261 In s5z/zsim;

· dsingh19 opened on Mar 21, 2022